Stephen G. Bennett

Stephen G. Bennett

SUNY Polytechnic Institute
Lithography and Etch Development Engineering Manager

Contact

Phone Number:
518-956-7005
Office Address:
NFX
449
Location
Albany
Faculty/Staff
Staff
Homepage
http://

Professional Background

  • Process Development Engineer, College of Nanoscale Science and Engineering (2005-present)
  • Associate Member of Technical Staff, Sarnoff Corporation (1997-2005)
  • Process Engineer, Texas Instruments (1995-1997)

Education

  • B.S. (Chemical Engineering), Clarkson University 1994
  • B.S. (Chemistry), SUNY Oneonta 1994

 

Responsibilities

As a Process Development Engineer, Mr. Bennett is responsible for multiple aspects of joint development activities with ASML, Tokyo Electron and Applied Materials for advanced processing within CNSE's 300mm full-flow wafer processing facility. 

Mr. Bennett is the primary contact for thin film deposition and reactive ion etch processes. He supports the daily tool and process activities within the Center for Semiconductor Research (CSR). Steve is also involved with faculty development projects including carbon nanotube electronics, spintronics and nano-bio applications.

Recent Conference Publications and Presentations

  • Stephen G. Bennett, Daniel R. Steinke, Zachary R. Robinson, Gayathri Rao, Sarah A. McTaggart, Christopher L. Borst, Robert E. Geer, Ji Ung Lee, "Post-CMOS Graphene Device Integration" 2008 VLSI Multilevel Interconnection Conference
  • W. Montgomery, S. Bennett, L. Huli, J. Weeks, "Driving Contact Hole Resolution to the 45nm using Novel Process Enhancement Techniques" 2008 SPIE Advanced Lithography
  • Christopher L. Borst, Stephen G. Bennett, Zachary R. Robinson, Daniel R. Steinke, Sarah A. McTaggart, James G. Ryan and Ji Ung Lee, "Oxide/Polysilicon CMP Process Integration for Novel Grahene and Carbon Nanotube Devices" Conference on Chemical-Mechanical Polish Planarization 2008
  • Christopher Borst, Lior Huli, Stephen Bennett, Huixiong Dai, Christopher Bencher and Yongmei Chen, " Driving Metallization dimensions to Sub-30nm Using Immersion Lithography and a Self-Algined Double Patterning Scheme" Advanced Metallization Conference 2007

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